keyboard - FF/Latch 和其他警告

标签 keyboard vhdl

我的 VHDL 代码有什么问题？这是代码:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity main is
    port(
        -- 50 MHz clock
        cp : in std_logic;
        -- Reset signal
        reset : in std_logic;
        -- PS/2 data and clock lines
        ps2d, ps2c : in std_logic;
        -- 7-segment display segments
        segments : out std_logic_vector (7 downto 0);
        -- Anode control
        an : out std_logic_vector (3 downto 0);
        -- Data out to LEDs
        dout : out std_logic_vector (7 downto 0)
    );
end main;

architecture Behavioral of main is
    -- Data from keyboard entity (scancode)
    signal data : std_logic_vector (7 downto 0);
    -- 7 segments of display
    signal segReg, segNext : std_logic_vector (6 downto 0);
    signal tickDone : std_logic;
begin
    -- Just an entity that reads PS/2 keyboard data
    -- rx_done is tick (20 ns)
    S1: entity keyboard port map ( cp => cp, ps2d => ps2d, ps2c => ps2c,
                          rx_done => tickDone, dout => data);
    dout <= data;
    an <= "1110";
    segments(6 downto 0) <= segReg;
    -- Turn off dot
    segments(7) <= '1';
    process (cp, reset)
    begin
        if reset = '1' then
            segReg <= (others => '0');
        elsif rising_edge (cp) then
            segReg <= segNext;
        end if;
    end process;

    process (tickDone, segReg)
    begin
        segNext <= segReg;
        if tickDone = '1' then
            if data = x"16" then
                -- Number 1
                segNext <= "1001111";
            elsif data = x"1E" then
                -- Number 2
                segNext <= "0010010";
            elsif data = x"26" then
                -- Number 3
                segNext <= "0000110";
            elsif data = x"25" then
                -- Number 4
                segNext <= "1001100";
            else
                segNext <= "1111111";
            end if;
        end if;
    end process;

end Behavioral;

当我尝试合成它/生成编程文件时，我收到以下警告:

WARNING:Xst:819 - "C:/VHDL_projekti/PS2K/main.vhd" line 48: The following signals are missing in the process sensitivity list:
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:1710 - FF/Latch  <segReg_0> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_1> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_2> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_3> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_4> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_5> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1710 - FF/Latch  <segReg_0> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_1> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_2> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_3> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_4> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_5> (without init value) has a constant value of 0 in block <main>.
WARNING:Par:288 - The signal reset_IBUF has no load.  PAR will not attempt to route this signal.
WARNING:Par:283 - There are 1 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
WARNING:PhysDesignRules:367 - The signal <reset_IBUF> is incomplete. The signal

我一直在查看代码，没有发现任何问题，但显然我做错了什么。

  1. “进程敏感列表中缺少以下信号”这可能是 Xilinx ISE 错误？我不明白为什么我需要第 48 行的过程敏感度列表中的任何其他信号...

  2. “由于其他 FF/Latch 调整， block 中的常量值为 0”好吧，我做错了什么？我根本不想使用闩锁...

  3. “信号reset_IBUF没有负载。PAR不会尝试路由该信号。”这是什么意思？我的复位信号有什么问题吗？为什么不完整？

这段代码是我尝试使用PS/2键盘 Spartan-3入门板。实体“键盘”进行读取，并且工作正常(当我单独测试它时，我在 dout 信号上得到正确的扫描代码(我在 LED 上看到它))。 rx_done 是一个刻度 (20 ns)，表示扫描代码已成功读取。

所以我只是想看看我是否能以某种方式识别扫描码(在我的第二个过程中，我正在比较数据信号并将正确的值放入 segNext 信号)并在 seven-segment display 上显示一些内容。当我让它工作时，我将实现正确的行为(检测所有扫描代码、额外的按键以及按键按下和按键启动事件)。

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity main is
    port(
        -- 50 MHz clock
        cp : in std_logic;
        -- Reset signal
        reset : in std_logic;
        -- PS/2 data and clock lines
        ps2d, ps2c : in std_logic;
        -- 7-segment display segments
        segments : out std_logic_vector (7 downto 0);
        -- Anode control
        an : out std_logic_vector (3 downto 0);
        -- Data out to LEDs
        dout : out std_logic_vector (7 downto 0)
    );
end main;

architecture Behavioral of main is
    -- Data from keyboard entity (scancode)
    signal data : std_logic_vector (7 downto 0);
    -- 7 segments of display
    signal segReg, segNext : std_logic_vector (6 downto 0);
    signal tickDone : std_logic;
begin
    -- Just entity that reads PS/2 keyboard data
    -- rx_done is tick (20 ns)
    S1: entity keyboard port map ( cp => cp, ps2d => ps2d, ps2c => ps2c,
                          rx_done => tickDone, dout => data);
    dout <= data;
    an <= "1110";
    segments(6 downto 0) <= segReg;
    -- Turn off dot
    segments(7) <= '1';
    process (cp, reset)
    begin
        if reset = '1' then
            segReg <= (others => '0');
        elsif rising_edge (cp) then
            segReg <= segNext;
        end if;
    end process;

    process (tickDone, segReg, data)
    begin
        if tickDone = '1' then
            if data = x"16" then
                -- Number 1
                segNext <= "1001111";
            elsif data = x"1E" then
                -- Number 2
                segNext <= "0010010";
            elsif data = x"26" then
                -- Number 3
                segNext <= "0000110";
            elsif data = x"25" then
                -- Number 4
                segNext <= "1001100";
            else
                segNext <= "1111111";
            end if;
        else
            segNext <= segReg;
        end if;
    end process;

end Behavioral;

不幸的是，在这些编辑之后，我仍然收到以下警告:

WARNING:Xst:1710 - FF/Latch <segReg_0> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_1> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_2> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_3> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_4> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_5> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_6> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <segReg_0> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_1> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_2> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_3> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_4> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_5> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Par:288 - The signal reset_IBUF has no load.  PAR will not attempt to route this signal.
WARNING:Par:283 - There are 1 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.

最佳答案

在组合过程中，您正在读取 tickDone、segReg 和 data。后者在您的敏感度列表中缺失，这会导致闩锁。

此外，请勿使用 STD_LOGIC_ARITH 或 STD_LOGIC_UNSIGNED。它们没有标准化并且存在一些问题。 http://parallelpoints.com/node/3

关于keyboard - FF/Latch 和其他警告，我们在Stack Overflow上找到一个类似的问题： https://stackoverflow.com/questions/9592982/

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