linux - #interrupt-cells 是 2 但中断是一个 3 元组

Question

我正在查看 Beagle Bone Black 的设备树并从 am57xx-beagle-x15.dts 开始.深入到 dra7.dtsi我找到了 gpio1 :

gpio1: gpio@4ae10000 {
            compatible = "ti,omap4-gpio";
            reg = <0x4ae10000 0x200>;
            interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
            ti,hwmods = "gpio1";
            gpio-controller;
            #gpio-cells = <2>;
            interrupt-controller;
            #interrupt-cells = <2>;
        };

我读过 #interrupt-cells给出了 interrupts 中的一个项目所期望的 u32 或单元的数量。列表。但是当我看 interrupts我看到一个三元组:<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH> .很想知道，为什么这包含 3 个单元格而不是 2 个？

Answer 1

这是一个很晚的答案，但添加一个以便有人可以获得帮助。
我无法从当前的 linux 5.15 源中找到确切的 dts 文件。但是节点的中断父节点应该需要 3 个单元的中断属性。对于 gic，通常需要 3 个值 - {interrupt type, interrupt number, flag}。它在gic的设备绑定(bind)文档中(Linux 5.15中的Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml)

  "#interrupt-cells":
    const: 3
    description: |
      The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
      interrupts.

      The 2nd cell contains the interrupt number for the interrupt type.
      SPI interrupts are in the range [0-987].  PPI interrupts are in the
      range [0-15].

      The 3rd cell is the flags, encoded as follows:
        bits[3:0] trigger type and level flags.
          1 = low-to-high edge triggered
          2 = high-to-low edge triggered (invalid for SPIs)
          4 = active high level-sensitive
          8 = active low level-sensitive (invalid for SPIs).
        bits[15:8] PPI interrupt cpu mask.  Each bit corresponds to each of
        the 8 possible cpus attached to the GIC.  A bit set to '1' indicated
        the interrupt is wired to that CPU.  Only valid for PPI interrupts.
        Also note that the configurability of PPI interrupts is IMPLEMENTATION
        DEFINED and as such not guaranteed to be present (most SoC available
        in 2014 seem to ignore the setting of this flag and use the hardware
        default value).