我有以下代码:
process(value_counter, hex5_value)
begin
if(value_counter <= x"0F") then
with value_counter select hex4 <= --error on this line
"0111111" when x"00",
"0000110" when x"01",
"1011011" when x"02",
"1001111" when x"03",
"1100110" when x"04",
"1101101" when x"05",
"1111101" when x"06",
"0000111" when x"07",
"1111111" when x"08",
"1101111" when x"09",
"1110111" when x"0A",
"1111100" when x"0B",
"0111001" when x"0C",
"1011110" when x"0D",
"1111001" when x"0E",
"1110001" when x"0F";
hex5<="0111111";
elsif(value_counter > x"0F") then
with value_counter mod 10 select hex4 <=
"0111111" when x"00",
"0000110" when x"01",
"1011011" when x"02",
"1001111" when x"03",
"1100110" when x"04",
"1101101" when x"05",
"1111101" when x"06",
"0000111" when x"07",
"1111111" when x"08",
"1101111" when x"09",
"1110111" when x"0A",
"1111100" when x"0B",
"0111001" when x"0C",
"1011110" when x"0D",
"1111001" when x"0E",
"1110001" when x"0F";
with hex5_value select hex5 <=
"0111111" when x"00",
"0000110" when x"01",
"1011011" when x"02",
"1001111" when x"03",
"1100110" when x"04",
"1101101" when x"05",
"1111101" when x"06",
"0000111" when x"07",
"1111111" when x"08",
"1101111" when x"09",
"1110111" when x"0A",
"1111100" when x"0B",
"0111001" when x"0C",
"1011110" when x"0D",
"1111001" when x"0E",
"1110001" when x"0F";
end if;
end process;
但是运行它时，在指定的行上出现以下错误:
Error (10500): VHDL syntax error at xxx near text "with"; expecting "end", or "(", or an identifier ("with" is a reserved keyword), or a sequential statement。有谁知道是什么原因造成的，以及如何合法合法地重写它？
最佳答案
“正确”的答案是流程内的CASE语句，或者组合区域内(即流程外)的“with ... select”。
但是，如果您创建了一个由16个7段显示值组成的常量数组，并简单地对该数组进行了索引，那么您将拥有更好的VHDL:
subtype seven_seg is std_logic_vector(6 downto 0);
constant decode : array 0 to 15 of seven_seg := (
"0111111", "0000110", "1011011", "1001111",
"1100110", "1101101", "1111101", "0000111",
"1111111", "1101111", "1110111", "1111100",
"0111001", "1011110", "1111001", "1110001");
process(value_counter, hex5_value)
begin
if value_counter <= x"0F" then
hex4 <= decode(to_integer(value_counter(3 downto 0)));
hex5 <= decode(0);
-- elsif value_counter > x"0F" then
-- surely this "elsif" is unnecessary!
else
hex4 <= decode(to_integer(value_counter(7 downto 4)));
hex5 <= decode(to_integer(hex5_value(3 downto 0)));
end if;
end process;
关于syntax - VHDL If语句语法错误，我们在Stack Overflow上找到一个类似的问题： https://stackoverflow.com/questions/14523828/